Digital Integrated Circuits 1.3 Suradnici

Course Description

Introduction. CMOS digital circuits devices. MOS transistor models. CMOS process layout rules. CMOS inverter - static and dynamic characteristics, power. Combinational CMOS logic circuits - complementary, ratioed, pass-transistor, dynamic circuits. Sequential CMOS circuits - latches and flip-flops. Wires and interconnections - parameters and models, lines distribution problems. Arithmetical CMOS circuits - adders, multipliers, shifters. Memory CMOS circuits - layout organization, memory core circuit implementations, peripheral circuits. Input/output circuits.

Learning Outcomes

  1. distinguish the role of individual layers of technological structure in the realization of CMOS circuits
  2. identify different types of CMOS digital circuits
  3. analyze basic CMOS digital circuits
  4. arrange the properties of CMOS circuit with the transistor dimensions
  5. evaluate the behavior of digital CMOS circuits
  6. compare the properties of certain types of CMOS digital circuits
  7. choose the kind of basic CMOS circuits to implement complex system
  8. evaluate the justification for the integration of digital systems on a chip

Forms of Teaching


Seminars and workshops


Week by Week Schedule

  1. Simplifies CMOS process flow, Introduction to CMOS layout design; Design rules
  2. Sub micrometer MOS transistor properties, Sub micrometer MOS transistor models
  3. Static CMOS inverter; Transfer characteristic; Noise margins, Dynamic CMOS inverter behaviour; Computing parasitic capacitances and transistor effective resistances; Propagation delay analysis, CMOS inverter power dissipation; Dynamic and static power consumption
  4. Interconnect capacitances and resistances; Electrical wire models, Large capacitance wire driving, Complementary CMOS logic gates
  5. Pseudo-nMOS logic gates, Pass transistor CMOS logic gates, Dynamic CMOS logic gates
  6. Dynamic sequential CMOS circuits, Clock-skew problems and solutions in CMOS circuits
  7. CMOS flip-flops and latches; Asynchronous and synchronous sequential CMOS circuits, Static sequential CMOS circuits
  8. Midterm exam
  9. CMOS Schmitt trigger; CMOS monostable and astable circuits, CMOS memory organization, CMOS static RAM (SRAM) cell
  10. CMOS dynamic RAM (DRAM) cell, CMOS memory peripheral circuits; Sense amplifiers; Address decoders
  11. CMOS read-only memories (ROM), Full adder; N-bit addition
  12. CMOS adders circuit design, CMOS adders logic design
  13. CMOS multipliers, Seminar, Project, Visit
  14. CMOS shifters, Not held, Guest Lecturer from Industry - overview of current procedures and practices
  15. Final exam

Study Programmes

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(.), Ž. Butković (2014.), Digitalni mikroelektronički sklopovi, Fakultet elektrotehnike i računarstva, Zagreb - interna skripta,
(.), J.M. Rabaey, A. Chandrakasan, B. Nikolić (2003.), Digital Integrated Circuits - A Design Perspective, 2nd ed., Prentice Hall,
(.), R.J. Baker (2010.), CMOS - Circuit Design, Layout, and Simulation, 3rd ed., IEEE Press & Wiley-Interscience,
(.), N.H. E. Weste, D. Harris (2011.), CMOS VLSI Design - A Circuits and Systems Perspective, 4th ed., Addison-Wesley,

For students


ID 222533
  Summer semester
L3 English Level
L1 e-Learning
45 Lectures
6 Exercises
12 Laboratory exercises