Embedded System Design

Learning Outcomes

  1. develop embedded computer system based on 32-bit microcontroller
  2. apply tools for electromechanic and funckional debugging and testing of embedded computer systems
  3. analyze library types and linking models
  4. modify software which uses retargeting and semihosting calls
  5. apply built-in peripherals for communication between microcontroller and environment
  6. recognize advantages of digital signal processors for applications in embedded systems
  7. apply specific DSP execution units for real-time signal processing
  8. develop embedded system on a chip

Forms of Teaching

Lectures

-

Laboratory

-

Grading Method

Continuous Assessment Exam
Type Threshold Percent of Grade Threshold Percent of Grade
Laboratory Exercises 0 % 20 % 0 % 20 %
Mid Term Exam: Written 0 % 35 % 0 %
Final Exam: Written 0 % 35 %
Final Exam: Oral 10 %
Exam: Written 50 % 70 %
Exam: Oral 10 %
Comment:

The pass is acquired if minimum 50% is gained of the total available score on the written part of the exams (midterm and final).

Week by Week Schedule

  1. Concept of embedded systems, Structure of basic computer system: CPU, memory, I/O, bus, Microprocessors and microcontrollers, Microcontroller families (4-bit, 8-bit, 16-bit, 32-bit), Processor core
  2. Integrated peripherals, Interrupts, polling, interrupt structures: vectored, prioritied, Direct memory access, Memory architectures, hierarchies, caches
  3. Soft core processors, Hard wired processors, System on Chip (SoC)
  4. Components, Specifications and design
  5. Principles of debugging, Boundary scan (JTAG), In circuit emulation (ICE)
  6. Debugging in semihosting environment, Benchmarks, Formal verification of embedded systems
  7. Families, Architectures, Principles of embedded design based on programmable devices
  8. Midterm exam
  9. FPGA platform elements: CPU, programmable logic, interconnects, interfaces, HDL programming for FPGAs, FPGA platform development tools, system-level programming, HW/SW partitioning for FPGA platform development
  10. Requirements analysis and identification of optimal HW/SW platform, Partitioning and integration of HW/SW solution, Design methodologies for HW/SW co-design, Architecture generation - program translation to architecture
  11. High level programming support for heterogeneous embedded systems (DSL- Domain Specific Language support: streaming, signal processing, etc;), Programming models for HW/SW codesign, heterogeneous systems, accelerators (GPU, coprocessors, programmable logic), High-level memory management for embedded systems runtimes (garbage collection, memory allocation, flash wear leveling)
  12. DSP versus general purpose processor, DSP architectures
  13. Combined MCU/DSP cores, Basic ALU operations
  14. Addressing modes, Interrupts
  15. Final exam

Study Programmes

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Literature

­Joseph Yiu (2013.), The Definitive Guide to ARM® Cortex-M3 and Cortex-M4 Processors, Newnes
L. H. Crockett, R. A. Elliot, M. A. Enderwitz, R. W. Stewart (2014.), The Zynq Book: Embedded Processing with the Arm Cortex-A9 on the Xilinx Zynq-7000 All Programmable Soc, Strathclyde Academic Media
D. Petrinović (2009.), Projektiranje ugradbenih računalnih sustava - Primjena DSP procesora u ugradbenim računalima, Materijali za predavanja, FER-ZESOI
I. Dokmanić, D. Petrinović (2009.), Laboratorijske vježbe iz PURS-a II (DSP), FER-ZESOI