Digital Logic

Course Description

Digital systems process in discrete steps real-world values previously converted into numbers. As within digital systems data are given a binary representation, what is based on both theoretical and technological grounds, digital systems are based upon logic circuits. The objective of the course is to introduce students to fundamental principles of digital systems design, starting with the elementary procedures of analysis and design. Elementary combinational and sequential components and modules are elaborated too, as well as the inclusion of digital systems in the real world.

General Competencies

Students will gain fundamental knowledge on the structure of digital systems, based on levels of characteristic logic circuits and subsystems, as well as on applying basic methods of digital systems analysis and design, both combinational and sequential. Students will be qualified to carry out basic design procedures using standard and programmable modules, under physical constraints imposed by both dynamic and electrical characteristics of circuits and their interconnections.

Learning Outcomes

  1. choose the appropriate level of standard combinational and sequential components to design simple digital circuits
  2. design simple combinational and sequential digital circuits
  3. analyze simple combinational and sequential digital circuits
  4. apply Boolean algebra as a formalism for describing of combinational and sequential digital circuits
  5. apply the VHDL hardware description language in modeling and simulation of simple combinational and sequential digital circuits
  6. identify and classify standard and programmable combinational and sequential digital circuits
  7. recognize the limitations represented by dynamic and electrical properties of digital circuits and their interconnections

Forms of Teaching

Lectures

-

Seminars and workshops

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Online in entirety

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Independent assignments

-

Grading Method

Continuous Assessment Exam
Type Threshold Percent of Grade Threshold Percent of Grade
Laboratory Exercises 50 % 15 % 50 % 15 %
Homeworks 0 % 10 % 0 % 0 %
Quizzes 0 % 5 % 0 % 0 %
Class participation 0 % 10 % 0 % 0 %
Mid Term Exam: Written 0 % 30 % 0 %
Final Exam: Written 40 % 40 %
Exam: Written 50 % 85 %
Comment:

Short evaluations will be in principle performed by assigning short tests during the lectures.

Week by Week Schedule

  1. Analog values and their digital representation
  2. Binary system, binary arithmetic, basic operations: addition, subtraction, and multiplication, Number systems and codes
  3. Binary codes and coding; Error detecting and error correcting codes
  4. Minimization of Boolean functions: algebraic and Karnaugh maps; Minimization requirements and limitations; Incompletely specified functions; Delay and hazard
  5. Basic latch, Flip-flop and flip-flop types, Triggering and dynamic parameters
  6. Standard combinational modules: decoders, demultiplexors, multiplexors, ROMs, priority encoders, and comparators, VHDL models of combinational modules, Standard combinational module implementation of Boolean functions
  7. Arithmetic circuits: adders, carry look-ahead generators, subtractors, multipliers, and shifters
  8. Midterm exam
  9. Sequential circuits; Finite state machines; Moore and Mealy automata; State diagram and table, Design of synchronous sequential circuits; State minimization; State coding, Analysis of synchronous sequential circuits
  10. Standard sequential modules: registers, shift registers, and counters (ripple and synchronous)
  11. Basic logic circuits: AND, OR, NOT, NAND, NOR, and EX-OR, Implementation of Boolean functions; Integrated digital circuits; Electrical characteristics
  12. PLDs and FPGAs, Programmable module implementation of Boolean functions
  13. D/A conversion, A/D conversion
  14. Characteristic parameters of memories, Static and dynamic memories, Memory modules organization
  15. Final exam

Study Programmes

University undergraduate
Electrical Engineering and Information Technology and Computing (study)
(1. semester)

Literature

U. Peruško, V. Glavinić (2005.), Digitalni sustavi, Školska knjiga
S. D. Brown, Z. G. Vranešić (2001.), Fundamentals of Digital Logic with VHDL Design, McGraw-Hill

Associate Lecturers

Exercises

Laboratory exercises

For students

General

ID 183360
  Winter semester
6 ECTS
L1 English Level
L1 e-Learning
60 Lectures
15 Exercises
15 Laboratory exercises

Grading System

88 Excellent
75 Very Good
62 Good
50 Acceptable