Computer Architecture 1E
Data is displayed for academic year: 2023./2024.
Lecturers
Laboratory exercises
Course Description
This course gives basic understanding of processor architecture and computer system organization. Internal architecture of a processor is explained together with the details of the instruction execution. Assembly language programming is explained. Interfacing with memory and IO units is explained. Principles are explained using ARM CPU architecture.
Study Programmes
University undergraduate
[FER3-EN] Electrical Engineering and Information Technology - study
(4. semester)
Learning Outcomes
- list the main parts of processors and computers
- explain how processors execute instructions
- explain the function of the main parts of a processor
- solve simple programming problems in assembly language
- explain the interfacing and communication between processor, memoy, and IO units
- solve simple problems of communication between processor and IO units
Forms of Teaching
Lectures
Lectures are held every week (3 hours per week). Theoretical foundations of computer architecture are explained together with practical programming examples using assembly language.
Independent assignmentsStudents solve simple problems using assembly language programming.
LaboratoryStudents write, debugg and execute assembly programs by using a computer architecture simulator.
Grading Method
Continuous Assessment | Exam | |||||
---|---|---|---|---|---|---|
Type | Threshold | Percent of Grade | Threshold | Percent of Grade | ||
Laboratory Exercises | 20 % | 15 % | 20 % | 7.5 % | ||
Quizzes | 20 % | 15 % | 20 % | 7.5 % | ||
Mid Term Exam: Written | 0 % | 30 % | 0 % | |||
Final Exam: Written | 0 % | 40 % |
Comment:
All Laboratory excercises must be succesfully completed (you dont get points for that) in order to get the passing grade.
Week by Week Schedule
- Number bases. Data representation in computers. Operations in computers. Parts of computers. Instructions and their execution. Assemblers.
- Instruction sets and instruction types. Data processing instructions. Data addressing modes.
- Control instructions (branches). Memory transfer instructions.
- Multiple data memory transfer instructions. Blocks of data. Stack
- Subroutines. Call and return mechanisms. Parameters and results. Stack frame.
- Programming techniques in assembly languages. Pipeline. Pipeline hazards.
- Pins. Buses. Interconnections of computer parts. Bus protocols. Memory organization.
- Midterm exam
- I/O fundamentals. I/O types. Synchronization. Handshaking. Paralel data transfer. GPIO unit.
- Interrupts. Interrupt system of ARM. ARM exceptions and modes. Counter/timer unit RTC.
- I/O programming. Unconditional, conditional, and interrupt I/O transfer.
- Direct memory access (DMA). DMAC controller.
- I/O programming. Combinations of different I/O types.
- I/O programming. Conencting and controlling periferal units.
- Final exam
Literature
Danko Basch, Ivana Bosnić (.), Rukopisi s predavanja,
Mario Kovač (2015.), Arhitektura računala,
For students
General
ID 209732
Summer semester
4 ECTS
L0 English Level
L1 e-Learning
45 Lectures
0 Seminar
0 Exercises
15 Laboratory exercises
0 Project laboratory
0 Physical education excercises
Grading System
90 Excellent
80 Very Good
65 Good
50 Sufficient