Computer Architecture 1E

Learning Outcomes

list the main parts of processors and computers
explain how processors execute instructions
explain the function of the main parts of a processor
solve simple programming problems in assembly language
explain the interfacing and communication between processor, memoy, and IO units
solve simple problems of communication between processor and IO units

Forms of Teaching

Lectures

Lectures are held every week (4 hours per week). Theoretical foundations of computer architecture are explained together with practical programming examples using assembly language.

Independent assignments

Students solve simple problems using assembly language programming.

Laboratory

Students write, debugg and execute assembly programs by using a computer architecture simulator.

Grading Method

By decision of the Faculty Council, in the academic year 2019/2020. the midterm exams are cancelled and the points assigned to that component are transferred to the final exam, unless the teachers have reassigned the points and the grading components differently. See the news for each course for information on knowledge rating.

	Continuous Assessment		Exam
Type	Threshold	Percent of Grade	Threshold	Percent of Grade
Laboratory Exercises	20 %	15 %	20 %	7.5 %
Quizzes	20 %	15 %	20 %	7.5 %
Mid Term Exam: Written	0 %	30 %	0 %
Final Exam: Written	0 %	40 %

Comment:

All Laboratory excercises must be succesfully completed (you dont get points for that) in order to get the passing grade.

Week by Week Schedule

Overview and history of computer architecture; Multiple representations/layers of interpretation (hardware is just another layer); Bits, bytes, and words; Numeric data representation and number bases; Fixed- and floating-point systems; Signed and twos-complement representations; Representation of non-numeric data (character codes, graphical data); Representation of records and arrays.
Basic organization of the von Neumann machine; Control unit; Instruction fetch, decode, and execution; Instruction sets and types (data manipulation, control, I/O); Registers; Register transfer notation.
Assembly/machine language programming; Instruction formats; Addressing modes.
Assembly/machine language programming.
Assembly/machine language programming; Subroutine call and return mechanisms.
I/O and interrupts; I/O fundamentals (handshaking, buffering, programmed I/O, interrupt-driven I/O); Interrupt structures (vectored and prioritized, interrupt acknowledgment).
External storage, physical organization, and drives; Buses: bus protocols, arbitration, direct-memory access (DMA).
Midterm exam.
Control unit; Instruction fetch, decode, and execution; Instruction sets and types (data manipulation, control, I/O); Instruction formats; Addressing modes.
Assembly/machine language programming.
I/O and interrupts; I/O fundamentals (handshaking, buffering, programmed I/O, interrupt-driven I/O); Interrupt structures (vectored and prioritized, interrupt acknowledgment).
I/O and interrupts.
Main memory organization and operations; Buses: bus protocols, arbitration, direct-memory access (DMA).
Storage systems and their technology; Memory hierarchy (importance of temporal and spatial locality); Latency, cycle time, bandwidth, and interleaving.
Final exam.