Computer Architecture 1R

Learning Outcomes

  1. list the main parts of processors and computers
  2. explain how processors execute instructions
  3. explain the function of the main parts of a processor
  4. solve simple programming problems in assembly language
  5. explain the interfacing and communication between processor, memoy, and IO units
  6. solve simple problems of communication between processor and IO units

Forms of Teaching

Lectures

Lectures are held every week (4 hours per week). Theoretical foundations of computer architecture are explained together with practical programming examples using assembly language.

Independent assignments

Students solve simple problems using assembly language programming.

Laboratory

Students write, debugg and execute assembly programs by using a computer architecture simulator.

Grading Method

Continuous Assessment Exam
Type Threshold Percent of Grade Threshold Percent of Grade
Laboratory Exercises 16 % 12 % 16 % 5 %
Quizzes 16 % 18 % 16 % 10 %
Mid Term Exam: Written 0 % 30 % 0 %
Final Exam: Written 0 % 40 %
Comment:

All Laboratory excercises must be succesfully completed (you dont get points for that) in order to get the passing grade.

Week by Week Schedule

  1. Overview and history of computer architecture, Multiple representations/layers of interpretation (hardware is just another layer), Bits, bytes, and words, Numeric data representation and number bases, Fixed- and floating-point systems, Signed and twos-complement representations, Representation of non-numeric data (character codes, graphical data), Representation of records and arrays
  2. Basic organization of the von Neumann machine, Control unit; Instruction fetch, decode, and execution, Instruction sets and types (data manipulation, control, I/O), Registers; Register transfer notation
  3. Assembly/machine language programming, Instruction formats, Addressing modes
  4. Assembly/machine language programming
  5. Assembly/machine language programming, Subroutine call and return mechanisms
  6. I/O and interrupts, I/O fundamentals (handshaking, buffering, programmed I/O, interrupt-driven I/O), Interrupt structures (vectored and prioritized, interrupt acknowledgment)
  7. External storage, physical organization, and drives, Buses: bus protocols, arbitration, direct-memory access (DMA)
  8. Midterm exam
  9. Control unit; Instruction fetch, decode, and execution, Instruction sets and types (data manipulation, control, I/O), Instruction formats, Addressing modes
  10. Assembly/machine language programming
  11. I/O and interrupts, I/O fundamentals (handshaking, buffering, programmed I/O, interrupt-driven I/O), Interrupt structures (vectored and prioritized, interrupt acknowledgment)
  12. Main memory organization and operations, Buses: bus protocols, arbitration, direct-memory access (DMA)
  13. Implementation of simple datapaths (including instruction pipelining, hazard detection, and resolution)
  14. Storage systems and their technology, Memory hierarchy (importance of temporal and spatial locality), Main memory organization and operations, Latency, cycle time, bandwidth, and interleaving
  15. Final exam

Study Programmes

University undergraduate
Computing (study)
(3. semester)

Literature

Mario Kovač (.), Arhitektura računala (knjiga),
Mario Kovač, Danko Basch (.), Rukopisi s predavanja,
Danko Basch, Martin Žagar, Branko Mihaljević, Marin Orlić, Josip Knezović, Ivana Bosnić, Daniel Hofman, Mario Kovač (.), Zbirka programskih zadataka za procesor FRISC,
Martin Žagar, Josip Knezović, Ivana Bosnić, Mario Kovač (.), Zbirka programskih zadataka za procesor ARM 7,

Laboratory exercises

General

ID 183393
  Winter semester
6 ECTS
L0 English Level
L1 e-Learning
60 Lectures
0 Exercises
18 Laboratory exercises
0 Project laboratory

Grading System

90 Excellent
80 Very Good
65 Good
50 Acceptable