Computer Architecture 1

Course Description

This course gives basic understanding of processor architecture and computer system organization. Principles are explained using simple RISC processor and commercial ARM CPU architecture. Internal architecture of a processor is explained together with the details of the instruction execution. Assembly language programming is explained. Interfacing with memory and IO units is explained.

General Competencies

Students will be able to understand fundamentals of computer architecture, and be able to solve basic programming problems using assembly language.

Learning Outcomes

  1. list the main parts of processors and computers
  2. explain how processors execute instructions
  3. explain the function of the main parts of a processor
  4. solve simple programming problems in assembly language
  5. explain the interfacing and communication between processor, memoy, and IO units
  6. solve simple problems of communication between processor and IO units

Forms of Teaching


Lectures are held every week (4 hours per week).


All exams are in written form

Laboratory Work

Laboratoy excercises are held three times per semester (2 hours per excercise)

Grading Method

By decision of the Faculty Council, in the academic year 2019/2020. the midterm exams are cancelled and the points assigned to that component are transferred to the final exam, unless the teachers have reassigned the points and the grading components differently. See the news for each course for information on knowledge rating.
Continuous Assessment Exam
Type Threshold Percent of Grade Threshold Percent of Grade
Laboratory Exercises 16 % 12 % 16 % 5 %
Quizzes 16 % 18 % 16 % 10 %
Mid Term Exam: Written 0 % 30 % 0 %
Final Exam: Written 0 % 40 %
Exam: Written 0 % 85 %

All 3 Laboratory excercises must be succesfully completed (you dont get points for that) in order to get the passing grade.

Week by Week Schedule

  1. Computer organization. Introduction to processor architectures.
  2. CISC and RISC processors. Basic model of a RISC processor. Instruction set of a processor.
  3. Datapath and instruction execution. Assembly language programming.
  4. Basic algorithms and techniques in assembly programming. Subroutines.
  5. Buses. Interfacing processor and memory. Bus communication protocols. Pipeline and instruction execution.
  6. IO data transfer. IO units. IO programming.
  7. Interrupts. Direct Memory Access (DMA).
  8. Midterm exam
  9. ARM processor architecture.
  10. ARM instruction set. Addressing modes of ARM processor.
  11. Programming ARM processor in assembly language. Subroutines.
  12. Exceptions, busses and IO data transfer for ARM processor.
  13. Pipeline and instruction execution for ARM processor.
  14. Memory organization. Cache memory. Basics of virtual memory.
  15. Final exam

Study Programmes

University undergraduate
Electrical Engineering and Information Technology and Computing (study)
(2. semester)

Prerequisites for


Mario Kovač, Danko Basch (2011.), Rukopisi s predavanja,
Mario Kovač (2015.), Arhitektura računala,
D. A. Patterson, J. L. Hennessy (2005.), Computer Organization & Design, 3rd ed., Morgan Kaufmann
Danko Basch, Martin Žagar, Branko Mihaljević, Marin Orlić, Josip Knezović, Ivana Bosnić, Daniel Hofman, Mario Kovač (2012.), Zbirka programskih zadataka za procesor FRISC, FER
Martin Žagar, Josip Knezović, Ivana Bosnić, Mario Kovač (2013.), Zbirka programskih zadataka za procesor ARM 7, FER

Laboratory exercises


ID 21010
  Summer semester
L0 English Level
L1 e-Learning

Grading System

90 Excellent
80 Very Good
65 Good
50 Acceptable