The Embedded System Environment (ESE)

http://www.cecs.uci.edu/~ese/


ESE is a toolset for modeling, synthesis and validation of multi-processor embedded system designs. It builds on over 15 years of research in system level design at CECS under Prof. Daniel Gajski. It consists of two parts: ESE Front End and ESE Back End.

ESE Front End provides automatic generation of SystemC transaction level models (TLMs) from graphical capture of system platform and application C/C++ code. ESE generated TLMs can be used either as virtual platforms for SW development or for fast and early timing estimation of system performance. The retargetable performance estimation utilizes the LLVM infrastructure.

ESE Back End provides automatic synthesis from TLM to Pin-Cycle Accurate Model (PCAM) consisting of RTL interfaces, system SW and prototype ready FPGA project files. ESE generated RTL can be synthesized using standard logic synthesis tools and system SW can be compiled along with application code for a given processor. ESE automatically creates Xilinx EDK projects for download to Xilinx boards.


No-Instruction-Set Computer (NISC) Toolset

http://www.ics.uci.edu/~nisc/

 

C-to-RTL synthesis: You can use NISC tools as a free C-to-RTL (i.e. C to Verilog) synthesis tool. With the NISC toolset, you can generate a customized RTL for your C code and then get the corresponding architecture description (GNR) and synthesizable Verilog code as output. In contrast to standard high-level synthesis (HLS) tools, after generating the architecture, you can go back, edit the generated architecture, and use it as the input of the NISC toolset again! This way, you can target specific improvement!
You can also accurately control the area, clock-frequency, power, layout routability, etc. (all of which are left to guesswork and trial-and-error in standard HLS tools!)

Embedded custom-processor design: You can use NISC tools to design embedded custom-processors. You can specify the datapath and the custom-functional units and then (without worrying about designing an instruction decoder, instruction binary, etc) use the NISC toolset to compile your C code on your custom processor.

Design space exploration: You can try any "What-if" scenario with the NISC toolset. Change your application C code or the architecture structure and see the results immediately! Explore the effects of adding/removing components, connections, or registers at different places in your datapath and see how it affects clock-frequency, number of cycles, power, area, energy, routability, etc.