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ECTS:
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6
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Lecturers in charge:
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Prof. dr. sc.
Branko Jeren
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English level:
1,1,1
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All teaching activities in the course will be held on English. This level includes courses with multiple groups (i.e., all teaching will be held strictly in Croatian for Croatian groups, and strictly in English for English groups).
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Description:
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Processor requirements for typical DSP applications: IIR, FIR, FFT. MAC, ALU, Shift. Memory organization, bus architecture, off chip bus, arbitration. Conventional and modulo addressing. FFT addressing. Control path architecture, control flow, looping, branch, pipeline, interrupt. Instruction set. Fundamental comparison of custom and current single chip DSP processor architectures. Applications.
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Literature:
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- Phil Lapsley, Jeff Bier, Amit Shoham, Edward A. Lee: DSP Processor Fundamentals, Architectures and Features ISBN: 0-7803-3405-1; January 1997., Wiley-IEEE Press
- Peter Pirsch: Architectures for Digital Signal Processing ISBN: 0-471-97145-6, June 1998., John Wiley & Sons
- Mayer-Lindenberg, Friedrich: Dedicated Digital Processors, Methods in Hardware/Software System Design; 1. Edition - January 2004., ISBN 0-470-84444-2 - John Wiley & Sons
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Ljetni semester
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course for
Graduation study
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